1. Field of the Invention
The present invention relates to a high density package structure for semiconductor devices, and more specifically to a high density, high heat dissipating, high reliable package structure for semiconductor devices.
2. Description of Related Art
Recently, semiconductor devices have a remarkable inclination of a large power consumption and a large chip size caused by increase of an integration density and speed-up of operation. In addition, for increased connection terminals, an increased package density and shortened delay times, consideration is now made on a flip-chip connection method which uses solder bumps of 100 .mu.m to 200 .mu.m in diameter. For example, semiconductor device chips are connected on a wiring substrate by use of for example bumps of Pb.sub.95 Sn.sub.5. The flip-chip connection using the bumps enables a high density package since a package area is substantially the same as that of the chip size, and also, a high speed signal propagation because of a shortened connection distance. Furthermore, since a whole surface of the chip is a connectable area, the number of external terminal pins can be increased.
However, a stress occurs due to difference in heat expansion between the wiring substrate and the semiconductor device chips in the flip-chip connection, and the stress will cause a thermal fatigue of the solder. As a result, heat cycle reliability is low.
Therefore, in order to obtain a connection reliability, it has been attempted to use mullite and aluminum nitride, which has a thermal expansion coefficient near to that of silicon, or silicon itself, as a substrate material.
At room temperature, most of heat generated from the semiconductor device chip is dissipated through a solid member in the inside of the package to atmosphere, by a thermal conduction. However, since the conventional package structure is such that the semiconductor device chips are connected to the wiring substrate by only the bumps having the diameter of 100 .mu.m to 200 .mu.m, the heat dissipation characteristics is not satisfactory. Therefore, it has been difficult to use the conventional package structure of the flip-chip type to a high power device.
In addition, in order to effectively dissipate a large amount of heat generated by semiconductor devices due to the increased integration density, Japanese Patent Application Laid-open No. 007456/1990 proposes a forced liquid cooling integrate circuit package, in which each of semiconductor device chips has its one principal surface connected to a wiring substrate by means of solder bumps, and its other principal surface connected to a flexible plate of a water jacket. In this structure, each semiconductor device chip is sandwiched and compressed between the wiring substrate and the flexible plate of a water jacket, so that the heat generated by each semiconductor device chip is dissipated from the one principal surface of the semiconductor device chip through the bumps and from the other principal surface of the semiconductor device chip to the flexible plate of a water jacket.
However, since a compressing stress acts on the bumps of 100 .mu.m to 200 .mu.m in diameter, fatigue is easy to occur in the solder bumps. In addition, it is difficult to work or process the semiconductor device chips, the solder bumps, a casing and the flexible plate of a water jacket, and they require an extremely high precision of size. Therefore, it is very expensive. Furthermore, since the cooling method is a forced cooling using a liquid, the package inevitably becomes a large size, and therefore, can be used in only a limited field of application.